Built-in SiS305 AGP 2X 128-bit 3D Graphics Accelerator
AGP 2X Controller
Supports AGP 2.0 compliant configuration setting
Supports AGP 2X with maximum 32 stages pipeline full side band function
Supports 1.5V AGP 2X slot interface
128-bit 3D Graphics Engine
Built-in 32-bit floating point VLIW primitive setup engine
Supports up to 512KB Turbo Queue Architecture to improved 3D command
order performance
Built-in 64K-bit texture cache
Supports AGP 2X for texture fetch, command fetch and parsing
Supports 125MHz 3D engine clock
High quality 3D engine, supports flat, shading, lighting,
dithering, rendering, …
High Performance 128-bit 2D Accelerator
Supports Turbo Queue Architecture to achieve high performance
Built-in Direct Draw accelerator
Built-in an 1T 128-bit BITBLT graphics engine
Supports memory-mapped, zero wait-state, burst engine write
Supports burst frame buffer read/write for memory
High Performance DVD Motion Compensation Decoder and Video Accelerator
MPEG-2 ISO/IEC 13818-2 MP@ML and MPEG-1 ISO/IEC
11172-2 standards compliant
Built-in motion compensation logic
Direct DVD to TV playback
Supports two independent video windows with overlay function and scaling
factors
Supports tearing free double/triple buffer flipping
24-bit true-color RAMDAC, 270MHz pixel clock, resolution up to 1920x1440
256 colors 60Hz NI
On board 32MB SDRAM
Supports VESA DPMS compliant VGA monitor for power management
WHQL certification, drivers support Windows 98/Me/NT/2000/XP, DX8
compatible
FCC, CE BSMI EMI Certification
